1. Field of the Invention
The present invention relates to a delay circuit which delays a signal for use in digital control or the like by a desired delay time and outputs it.
2. Related Art
In general, a delay circuit for supplying a control signal having a specified pattern at different timings is used in a semiconductor device (e.g., refer to Japanese Patent Application Publication No. 10-32473 or Microfilm of Japanese Utility Model Application No. 61-178214 (Japanese Utility Model Application Publication No. 63-174724)). In a configuration of such a delay circuit in the semiconductor device, a signal is input to series-connected inverters, and delays of the respective inverters depending on time constant thereof are accumulated to obtain a desired delay time.
A long delay time is often required for the delay circuit in the semiconductor device. A first method for obtaining the long delay time is to configure the delay circuit using a large number of inverters. A second method for obtaining the long delay time is to increase the time constant of each inverter in the delay circuit. The second method can be realized, for example, by reducing the size of the inverters to reduce current supply ability, and by providing a capacitor connected to the output-side in order to prolong the charge/discharge time.
Further, in addition to the long delay time, a plurality of delayed signals which are delayed sequentially at constant intervals is used in operation in a form of using the delay circuit. By using such a delay circuit, many control signals having slightly shifted timings can be supplied when controlling many elements to be controlled sequentially, and thereby facilitating control thereof.
However, when obtaining the long delay time using the delay circuit by the above-mentioned first method, the longer the delay time is, the more the number of connections of the inverters. Thereby, an increase in layout area of the semiconductor device is inevitable, and there is a fear of an increase in chip size or cost increase. On the other hand, by the above-mentioned second method, the inverters have to be formed small enough to obtain large time constant, and thus the delay circuit may be affected by manufacturing process or fluctuation of power supply. As a result, it is a problem that accuracy of the delay time of the delay circuit is deteriorated. Further, even if the long delay time is obtained in the entire delay circuit, it is difficult to realize a configuration in which a plurality of delayed signals having different timings at constant intervals is generated and used for control.